Texas Instruments TMS320C28x Reference Manual page 675

Dsp cpu and instruction set
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Glossary
peripheral-interface logic: Hardware that is responsible for handling com-
munications between a processor and a peripheral.
PH: The high word (16 MSBs) of the P register.
phases: See pipeline phases.
pipeline: The hardware in the CPU that takes each instruction through eight
independent phases for fetching, decoding, and executing. During any
given CPU cycle, there can be up to eight instructions in the pipeline,
each at a different phase of completion. The phases, listed in the order
in which instructions pass through them, are fetch 1, fetch 2, decode 1,
decode 2, read 1, read 2, execute, and write.
pipeline conflict: A situation in which two instructions in the pipeline try to
access a register or memory location out of order, causing improper code
operation. The C28x pipeline inserts as many inactive cycles as needed
between conflicting instructions to prevent pipeline conflicts.
pipeline freeze: A halt in pipeline activity in one of the two decoupled por-
tions of the pipeline. Freezes in the fetch 1 through decode 1 portion of
the pipeline are caused by a not-ready signal from program memory.
Freezes in the decode 2 through write portion are caused by lack of in-
structions in the instruction-fetch queue or by not-ready signals from
memory.
pipeline phases: The eight stages an instruction must pass through to be
fetched, decoded, and executed. The phases, listed in the order in which
instructions pass through them, are fetch 1, fetch 2, decode 1, decode 2,
read 1, read 2, execute, and write.
pipeline-protection mechanism: The mechanism responsible for identify-
ing potential pipeline conflicts and preventing them by adding inactive
cycles between the conflicting instructions.
PL: The low word (16 LSBs) of the P register.
PM bits: See product shift mode (PM) bits.
PRDB: See program-read data bus (PRDB).
priority: See interrupt priority.
product register (P): This register, also called the P register, is given the re-
sults of most multiplications done by the CPU. The only other register that
can be given the result of a multiplication is the accumulator (ACC). See
also PH and PL.

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