Table 2−10. Instructions Affected by SXM
Instruction
ADD
ACC,#16bit << shift
ADD
ACC,loc16 << shift
ADD
ACC,loc16 << T
CLRC SXM
MOV
ACC,#16bit << shift
MOV
ACC,loc16 << shift
MOV
ACC,loc16 << T
SETC SXM
SFR
ACC,1..16
SFR
ACC,T
SUB
ACC,#16bit << shift
SUB
ACC,loc16 << shift
SUB
ACC,loc16 << T
Status Register (ST0)
Description
Affected By SXM
Affected By SXM
Affected By SXM
SXM = 0
Affected By SXM
Affected By SXM
Affected By SXM
SXM = 1
Affected By SXM
Affected By SXM
Affected By SXM
Affected By SXM
Affected By SXM
Central Processing Unit
2-33
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