Texas Instruments TMS320C28x Reference Manual page 482

Dsp cpu and instruction set
Table of Contents

Advertisement

SFR ACC,#1..16
SYNTAX OPTIONS
SFR ACC,#1..16
Operands
ACC
#1..16
Description
Flags and
Z
Modes
N
C
SXM
Repeat
Example
; Arithmetic shift right contents of VarA by 10:
MOVL
SETC
SFR
MOVL
1111 1111 0100 SHFT
Accumulator register
Shift value
Right shift the content of the ACC register by the amount specified in the shift
field. The type of shift (arithmetic or logical) is determined by the state of the
sign extension mode (SXM) bit:
if(SXM = 1)
ACC = S:ACC >> shift value; // arithmetic shift right
else
ACC = 0:ACC >> shift value; // logical shift right
After the shift, the Z flag is set if the ACC value is zero, else Z is cleared.
After the shift, the N flag is set if bit 31 of the ACC is 1, else N is cleared.
The last bit shifted out is loaded into the C flag bit.
If (SXM = 1), then the operation behaves like an arithmetic right shift.
If (SXM = 0), then the operation behaves like a logical right shift.
This instruction is repeatable. If the operation follows a RPT instruction, then
the SFR instruction will be executed N+1 times. The state of the Z, N and C
flags will reflect the final result.
ACC,@VarA
SXM
ACC,#10
@VarA,ACC
OPCODE
OBJMODE
// sign extension mode enabled
//sign extension mode disabled
; ACC = VarA
; Enable sign extension mode
; Arithmetic shift right ACC by 10
; Store result into VarA
SFR ACC,#1..16
Shift Accumulator Right
RPT
CYC
X
Y
N+1
6-325

Hide quick links:

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TMS320C28x and is the answer not in the manual?

Subscribe to Our Youtube Channel

Table of Contents

Save PDF