Texas Instruments TMS320C28x Reference Manual page 499

Dsp cpu and instruction set
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SUBB XARn,#7bit
SUBB XARn,#7bit
SYNTAX OPTIONS
SUBB XARn, #7bit
Operands
XARn
#7bit
Description
Flags and
Modes
Repeat
Example
MOVL XAR1,#VarA
MOVL XAR2,*XAR1
SUBB XAR2,#10h'
6-342
1101 1nnn 1CCC CCCC
XAR0 to XAR7, 32-bit auxiliary registers
7−bit immediate constant value
Subtract the 7−bit unsigned constant from XARn and store the result in
XARn:
XARn = XARn − 0:7bit;
None
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
Subtract 7-Bit From Auxiliary Register
OPCODE
; Initialize XAR1 pointer with address
; of VarA
; Load XAR2 with contents of VarA
; XAR2 = VarA − 0x10
OBJMODE
RPT
CYC
X
1

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