Texas Instruments TMS320C28x Reference Manual page 537

XMACD P,loc16,*(pma)
XMACD P,loc16,*(pma)
SYNTAX OPTIONS
XMACD P,loc16,*(pma)
Operands P
loc16
*(pma) Immediate program memory address, access high 64K range of program
Description
Flags and Z
Modes
N
C
V
OVC
6-380
C2xLP Source-Compatible Multiply and Accumulate With Data Move
1010 0100 LLLL LLLL
CCCC CCCC CCCC CCCC
Product register
Addressing mode (see Chapter 5)
Note: For this operation, register-addressing modes cannot be used. The
modes are: @ARn, @AH, @AL, @PH, @PL, @SP, @T. An illegal instruction
trap will be generated.
space only (0x3F0000 to 0x3FFFFF)
The XMACD instruction functions in the same manner as the XMAC, with the
addition of a data move. Add the previous product (stored in the P register),
shifted as specified by the product shift mode (PM), to the ACC register. Next,
load the T register with the content of the location pointed to by the "loc16"
addressing mode. Then, multiply the signed 16-bit content of the T register by
the signed 16-bit content of the addressed program memory location and
store the 32-bit result in the P register. Last, store the content in the T register
onto the next highest memory address pointed to by "loc16" addressing
mode:
ACC = ACC + P << PM;
T = [loc16];
P = signed T * signed Prog[0x3F:pma];
[loc16 + 1] = T;
The C28x forces the upper 6 bits of the program memory address, specified
by the "*(pma)" addressing mode, to 0x3F when using this form of the MAC
instruction. This limits the program memory address to the high 64K of
program address space (0x3F0000 to 0x3FFFFF). On the C28x devices,
memory blocks are mapped to both program and data space (unified
memory), therefore, the "(pma)" addressing mode can be used to access
data-space variables that fall within its address range.
After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
After the addition, the N flag is set if bit 31 of the ACC is 1, else N is cleared.
If the addition generates a carry, C is set; otherwise C is cleared.
If an overflow occurs, V is set; otherwise V is not affected.
If overflow mode is disabled and if the operation generates a positive
overflow, the counter is incremented. If overflow mode is disabled and if the
operation generates a negative overflow, the counter is decremented.
OPCODE OBJMODE RPT CYC
1 Y N+2