Texas Instruments TMS320C28x Reference Manual page 394

MPYS P,T,loc16
SYNTAX OPTIONS
MPYS P,T,loc16
Operands P
T
loc16
Description
Flags and Z
Modes
N
C
V
OVC
OVM
PM
Repeat
0001 0011 LLLL LLLL
Product register
Multiplicand register
Addressing mode (see Chapter 5)
Subtract the previous product (stored in the P register), shifted as specified
by the product shift mode (PM), from the ACC register. In addition, multiply
the signed 16-bit content of the T register by the signed 16-bit constant value
and store the result in the P register:
ACC = ACC − P << PM;
P = signed T * signed [loc16];
After the operation, the Z flag is set if the ACC is zero, else Z is cleared.
After the subtraction, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
If the subtraction generates a carry, C is set; otherwise C is cleared.
If an overflow occurs, V is set; otherwise V is not affected.
If overflow mode is disabled; and if the operation generates a positive
overflow, then the counter is incremented. If overflow mode is disabled; and if
the operation generates a negative overflow, then the counter is
decremented.
If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
The value in the PM bits sets the shift mode for the output operation from the
product register. If the product shift value is positive (logical left shift
operation), then the low bits are zero filled. If the product shift value is
negative (arithmetic right shift operation), the upper bits are sign extended.
This instruction is repeatable. If the operation follows a RPT instruction, then
it will be executed N+1 times. The state of the Z, N, C and OVC flags will
reflect the final result. The V flag will be set if an intermediate overflow
occurs.
16 X 16-bit Multiply and Subtract
OPCODE OBJMODE
MPYS P,T,loc16
RPT CYC
X Y N+1
6-237