CLRC M0M1MAP
CLRC M0M1MAP
SYNTAX OPTIONS
CLRC M0M1MAP
Operands
M0M1MAP
Description
C28 at Reset
(M0M1MAP = 1)
Program Space
M0
M1
Note:
The pipeline is flushed when this instruction is executed. This bit is provided for compatibility for users migrating from
C27x. The M0M1MAP bit should always remain set to 1 for users operating in C28x mode and C2xLP
source-compatible mode.
Flags and
M0M1MAP
Modes
Example
; Set the device mode from reset to C27x object-compatible mode:
Reset:
CLRC OBJMODE
CLRC AMODE
.c28_amode
CLRC M0M1MAP
.
.
6-68
0101 0110 0011 1111
Status bit
Clear the M0M1MAP status bit in Status Register ST1, configuring the
mapping of the M0 and M1 memory blocks for C27x operation. The
memory blocks are mapped as follows:
Data Space
00 0000
M0
00 0400
M1
00 07FF
The M0M1MAP bit is cleared.
; Enable C27x Object Mode
; Enable C27x/C28x Address Mode
; Tell assembler we are in C27x/C28x addr mode
; Enable C27x Mapping Of M0 and M1 blocks
Clear the M0M1MAP Bit
OPCODE
OBJMODE
C27x Compatible Mapping
(M0M1MAP = 0)
Program Space
M1
M0
RPT
CYC
X
−
5
Data Space
00 0000
M0
00 0400
M1
00 07FF
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