Texas Instruments TMS320C28x Reference Manual page 220

Dsp cpu and instruction set
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C27OBJ
SYNTAX OPTIONS
C27OBJ
Note:
This instruction is an alias for the "CLRC OBJMODE" operation.
Operands
Description
Flags and
Modes
Repeat
Example
;
Set the device mode from reset to C27x
Reset:
C27OBJ
C28ADDR
.c28_amode
C27MAP
.
.
0101 0110 0011 0110
None
Clear the OBJMODE status bit in Status Register ST1, configuring the device
to execute C27x object code. This is the default mode of the processor after
reset.
Note:
The pipeline is flushed when this instruction is executed.
Clear the OBJMODE bit.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
; Enable C27x Object Mode
; Enable C27x/C28x Address Mode
; Tell assembler we are in C27x/C28x addr mode
; Enable C27x Mapping Of M0 and M1 blocks
Clear the OBJMODE Bit
OPCODE
OBJMODE
:
C27OBJ
RPT
CYC
X
5
6-63

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