Texas Instruments TMS320C28x Reference Manual page 463

QMPYSL P,XT,loc32
QMPYSL P,XT,loc32
SYNTAX OPTIONS
QMPYSL P,XT,loc32
Operands P
XT
loc32
Description
Flags and Z
Modes
N
C
V
OVC
OVM
PM
Repeat
6-306
Signed 32-bit Multiply (Upper Half) and Subtract Previous P
0101 0110 0100 0101
0000 0000 LLLL LLLL
Product register
Multiplicand register
Addressing mode (see Chapter 5)
Signed 32-bit x 32-bit multiply and subtract the previous product. Subtract
the previous signed product (stored in the P register), shifted as specified by
the product shift mode (PM), from the ACC register. In addition, multiply the
signed 32-bit content of the XT register by the signed 32-bit constant value
and store the upper 32−bits of the 64-bit result in the P register:
ACC = ACC − P << PM;
P = (signed T * signed [loc32]) >> 32;
After the subtraction, the Z flag is set if the ACC value is zero, else Z is
cleared.
After the subtraction, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
If the subtraction generates a borrow, C is cleared; otherwise C is set.
If an overflow occurs, V is set; otherwise V is not affected.
If overflow mode is disabled; and if the operation generates a positive
overflow, then the counter is incremented. If overflow mode is disabled; and if
the operation generates a negative overflow, then the counter is
decremented.
If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
The value in the PM bits sets the shift mode for the output operation from the
product register. If the product shift value is positive (logical left shift
operation), then the low bits are zero filled. If the product shift value is
negative (arithmetic right shift operation), the upper bits are sign extended.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
OPCODE OBJMODE RPT CYC
1 − 1