Texas Instruments TMS320C28x Reference Manual page 290

Dsp cpu and instruction set
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LSL ACC,#1..16
SYNTAX OPTIONS
LSL ACC,#1..16
Operands
ACC
#1..16
Description
Flags and
N
Modes
Z
C
Repeat
Example
; Logical shift left contents of VarA by 4:
MOVL
LSL
MOVL
1111 1111 0011 SHFT
Accumulator register
Shift value
Perform a logical shift left on the content of the ACC register by the amount
specified by the shift value. During the shift, the low order bits of the ACC
register are zero filled and the last bit shifted out is stored in the carry flag bit:
Last bit out
C
Discard
other bits
After the shift, if bit 31 of ACC is 1 then the negative flag bit is set; otherwise it
is cleared.
After the shift, if ACC is 0, then the Z bit is set, otherwise it is cleared.
The last bit to be shifted out of ACC is stored in C.
This instruction is repeatable. If the operation follows a RPT instruction, then
the LSL instruction will be executed N+1 times. The state of the Z, N, and C
flags will reflect the final result.
ACC,@VarA
ACC,#4
@VarA,ACC
OPCODE
OBJMODE
ACC
Left shift
(Immediate value)
ACC
; ACC = VarA
; Logical shift left ACC by 4
; Store result into VarA
LSL ACC,#1..16
Logical Shift Left
RPT
CYC
X
Y
N+1
0
6-133

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