Texas Instruments TMS320C28x Reference Manual page 311

MINCUL P,loc32
MINCUL P,loc32
SYNTAX OPTIONS
MINCUL P,loc32
Operands P
loc32
Description
Flags and N
Modes Z
V
Repeat
Example
; Saturate 64-bit Var64 as follows:
; if(Var64 > MaxPos64 ) Var64 = MaxPos64
; if(Var64 < MaxNeg64 ) Var64 = MaxNeg64
MOVL
MOVL
MINL
MINCUL P,@MaxPos64+0
MAXL
MAXCUL P,@MaxNeg64+0
MOVL
MOVL
6-154
Product register
Addressing mode (see Chapter 5)
Based on the state of the N and Z flags, conditionally compare the unsigned
contents of the P register with the 32-bit, unsigned content of the location
pointed to by the "loc32" addressing mode and load the P register with the
smaller of the two numbers:
if( (N = 0) & (Z = 0) )
P = [loc32];
if( (N = 0) & (Z = 1) & (P > [loc32]) )
V=1, P = [loc32];
if( (N = 1) & (Z = 0) )
P = unchanged;
Note: The "p < [loc32]" operation is treated like a 32-bit unsigned compare.
This instruction is typically combined with the MINL instruction to form a
64-bit minimum function. It is assumed that the N and Z flags will first be set
by using a MINL instruction to compare the upper 32 bits of a 64-bit value.
The MINCUL instruction is then used to conditionally compare the lower 32
bits based on the results of the upper 32-bit comparison.
If (N = 1 AND Z = 0), then load the P register with [loc32].
If (N = 0 AND Z =1), compare unsigned and load P with the smaller P register
to [loc32].
If (N = 0 AND Z = 0), do nothing.
If (N = 0 AND Z = 1 AND P < [loc32] ) then V is set; otherwise, V is unchanged.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
ACC,@Var64+2
P,@Var64+0
ACC,@MaxPos64+2
ACC,@MaxNeg64+2
@Var64+2,ACC
@Var64+0,P
Conditionally Find the Unsigned Minimum
OPCODE
0101 0110 0101 1001
xxxx xxxx LLLL LLLL
; Load ACC:P with Var64
; if(ACC:P > MaxPos64) ACC:P = MaxPos64
; if(ACC:P < MaxNeg64) ACC:P = MaxNeg64
; Store result into Var64
OBJMODE RPT CYC
1 − 1