Texas Instruments TMS320C28x Reference Manual page 466

Dsp cpu and instruction set
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QMPYXUL P,XT,loc32
SYNTAX OPTIONS
QMPYXUL P,XT,loc32
Operands
P
XT
loc32
Description
Flags and
Modes
Repeat
Example
; Calculate signed result: Y64 = (M64*X64) >> 64 + B64
; Y64 = Y1:Y0, M64 = M1:M0, X64 = X1:X0, B64 = B1:B0
MOVL
QMPYXUL P,XT,@M0
MOV
LSL64
ASR64
MOVL
MOVL
MOVL
QMPYXUL P,XT,@X0
MOV
LSL64
ASR64
MOVL
MOVL
IMPYL
QMPYL
ADDUL
ADDCL
ADDUL
ADDCL
ADDUL
ADDCL
MOVL
MOVL
0101 0110 0100 0010
0000 0000 LLLL LLLL
Product register
Multiplicand register
Addressing mode (see Chapter 5)
Multiply the signed 32-bit content of the XT register by the unsigned 32-bit
content of the location pointed to by the "loc32" addressing mode and store
the upper 32−bits of the 64-bit result in the P register:
P = (signed XT * unsigned [loc32]) >> 32;
None
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
XT,@X1
; XT
; P
@T,#32
; T = 32
ACC:P,T
; ACC:P = ACC:P << T
ACC:P,T
; ACC:P = ACC:P >> T
@XAR4,P
; XAR5:XAR4 = ACC:P
@XAR5,ACC
XT,@M1
; XT
; P
@T,#32
; T = 32
ACC:P,T
; ACC:P = ACC:P << T
ACC:P,T
; ACC:P = ACC:P >> T
@XAR6,P
; XAR7:XAR6 = ACC:P
@XAR7,ACC
P,XT,@X1
; P
ACC,XT,@X1
; ACC = high 32−bits of (sign M1 * sign X1)
P,@XAR4
; ACC:P = ACC:P + XAR5:XAR4
ACC,@XAR5
P,@XAR6
; ACC:P = ACC:P + XAR7:XAR6
ACC,@XAR7
P,@B0
; ACC:P = ACC:P + B64
ACC,@B1
@Y0,P
; Store result into Y64
@Y1,ACC
Signed X Unsigned 32-bit Multiply (Upper Half)
OPCODE
= X1
= high 32−bits of (uns M0 * sign X1)
= M1
= high 32−bits of (sign M1 * uns X0)
= low
32−bits of (sign M1 * sign X1)
QMPYXUL P,XT,loc32
OBJMODE
RPT
CYC
1
1
6-309

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