Table D−8. C2xLp and C28x Differences in Memory Maps (Continued)
Migration topic
9
CNF bit mapping of B0
Block
10
Vector table range
11
Internal SARAM mapping
in data memory
5
I/O space
6
Global space
Table D−9. C2xLP and C28x Differences in Instructions and Registers
Migration topic
1
Conditional Instructions
Branches, Calls, Returns
2
When are CPU Flags up-
dated?
3
Repeat instructions
Reference Tables for C2xLP Code Migration Topics
C2xLP
CNF bit maps B0 in data and
program memory
CNF =0 − B0 in data memory
Range: 0x0300−0x03FF
: 0x0400−0x04FF
CNF =1 − B0 in program memory
Range: 0xFE00−0xFEFF
: 0xFF00−0xFFFF
Size: 32x16 words
Range: 0x0000−0x003F
Mapped as internal memory map
Range : 0x0000 −0xFFFFh
Range : 0x8000 −0xFFFFh
C2xLP
Can take more than one condi-
tion in these instructions
Conditional flags update on Ac-
cumulator operation only
Many instructions are repeatable
C28x
Not applicable
Size 32x32 words
0x3F FFC0 – 0x3F FFFF − at reset
In C28x based DSP devices may use
additional expanded vector table
(e.g., PIE)
Reserved for emulation registers
Range : 0x0800 −0x1000h
Range : 0x0x00 000 −0x00 FFFFh
I/O Space may or may not be imple-
mented on a particular device. See
the device datasheet for details.
Implemented via the XINTF
Global Space may or may not be im-
plemented on a specific C28x device.
See the device datasheet for details.
C28x
The C28x assembler will automatical-
ly break the instructions into multiple
instructions.
Conditional flags update on Accumu-
lator, register and memory operations
Same instructions are repeatable.
For additional repeatable instructions
see Table E−3.
C2xLP Migration Guidelines
D-13
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