Texas Instruments TMS320C2812 Manuals

Manuals and User Guides for Texas Instruments TMS320C2812. We have 1 Texas Instruments TMS320C2812 manual available for free PDF download: Data Manual

Texas Instruments TMS320C2812 Data Manual

Texas Instruments TMS320C2812 Data Manual (172 pages)

Digital Signal Processors

Brand: Texas Instruments | Category: Signal Processors | Size: 1.76 MB

Table of Contents

Table of Contents
2
List of Tables

9
1 Tms320F281X, Tms320C281X Dsps

10
- Features
  10
- Getting Started
  11
2 Introduction

12
3 Functional Overview

26
- Memory Map
  27
- Functional Block Diagram
  27
- F2812/C2812 Memory Map
  28
- F2811/C2811 Memory Map
  29
- F2810/C2810 Memory Map
  29
- Addresses of Flash Sectors in F2812 and F2811
  30
- Addresses of Flash Sectors in F2810
  30
- Wait States
  31
  - Brief Descriptions
    32
    
    C28X CPU
    32
    
    Memory Bus (Harvard Bus Architecture)
    32
    
    Peripheral Bus
    32
    
    Real-Time JTAG and Analysis
    33
    
    External Interface (XINTF) (2812 Only)
    33
    
    Flash (F281X Only)
    33
    
    ROM (C281X Only)
    33
    
    M0, M1 Sarams
    34
    
    L0, L1, H0 Sarams
    34
    
    Boot ROM
    34
    
    Security
    34
- Boot Mode Selection
  34
- Impact of Using the Code Security Module
  35
  - Peripheral Interrupt Expansion (PIE) Block
    36
  - External Interrupts (XINT1, XINT2, XINT13, XNMI)
    36
  - Oscillator and PLL
    36
  - Watchdog
    36
  - Peripheral Clocking
    36
  - Low-Power Modes
    36
  - Peripheral Frames 0, 1, 2 (Pfn)
    37
  - General-Purpose Input/Output (GPIO) Multiplexer
    37
  - 32-Bit CPU-Timers (0, 1, 2)
    37
  - Control Peripherals
    37
  - Serial Port Peripherals
    38
  - Register Map
    39
- Peripheral Frame 0 Registers
  39
- Peripheral Frame 1 Registers
  39
- Peripheral Frame 2 Registers
  40
  - Device Emulation Registers
    41
  - External Interface, XINTF (2812 Only)
    42
- External Interface Block Diagram
  42
  - Timing Registers
    43
  - XREVISION Register
    43
- XINTF Configuration and Control Register Mappings
  43
- XREVISION Register Bit Definitions
  43
  - Interrupts
    44
- Interrupt Sources
  44
- Multiplexing of Interrupts Using the PIE Block
  45
- PIE Peripheral Interrupts
  45
- PIE Configuration and Control Registers
  46
  - External Interrupts
    47
- External Interrupts Registers
  47
  - System Control
    48
- Clock and Reset Domains
  48
- PLL, Clocking, Watchdog, and Low-Power Mode Registers
  49
  - OSC and PLL Block
    50
    
    Loss of Input Clock
    51
- PLLCR Register Bit Definitions
  51
  - PLL-Based Clock Module
    52
  - External Reference Oscillator Clock Option
    52
- Recommended Crystal/Clock Connection
  52
- Possible PLL Configuration Modes
  52
  - Watchdog Block
    53
- Watchdog Module
  53
  - Low-Power Modes Block
    54
- F281X and C281X Low-Power Modes
  54
4 Peripherals

55
5 Development Support

86
6 Electrical Specifications

91
7 Revision History

161
8 Mechanical Data

162

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