6.2 Register Operations - Texas Instruments TMS320C28x Reference Manual

Dsp cpu and instruction set
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Register Operations

6.2 Register Operations

Note:
Table 6−2. Register Operations
Mnemonic
XARn Register Operations (XAR0−XAR7)
ADDB
XARn,#7bit
ADRK
#8bit
CMPR
0/1/2/3
MOV
AR6/7,loc16
MOV
loc16,ARn
MOV
XARn,PC
MOVB
XARn,#8bit
MOVB
AR6/7,#8bit
MOVL
XARn,loc32
MOVL
loc32,XARn
MOVL
XARn,#22bit
MOVZ
ARn,loc16
SBRK
#8bit
SUBB
XARn,#7bit
DP Register Operations
MOV
DP,#10bit
MOVW
DP,#16bit
MOVZ
DP,#10bit
SP Register Operations
ADDB
SP,#7bit
POP
ACC
POP
AR1:AR0
POP
AR1H:AR0H
6-4
The examples in this chapter assume that the device is already operating in
C28x Mode (OBJMODE == 1, AMODE == 0). To put the device into C28x mode
following a reset, you must first set the OBJMODE bit in ST1 by executing the
"C28OBJ" (or "SETC OBJMODE") instruction.
Description
Add 7-bit constant to auxiliary register
Add 8-bit constant to current auxiliary register
Compare auxiliary registers
Load auxiliary register
Store 16-bit auxiliary register
Save the current program counter
Load auxiliary register with 8-bit value
Load auxiliary register with an 8-bit constant
Load 32-bit auxiliary register
Store 32-bit auxiliary register
Load 32-bit auxiliary register with constant value
Load lower half of XARn and clear upper half
Subtract 8-bit constant from current auxiliary register
Subtract 7-bit constant from auxiliary register
Load data-page pointer
Load the entire data page
Load data page and clear high bits
Add 7-bit constant to stack pointer
Pop ACC register from stack
Pop AR1 & AR0 registers from stack
Pop AR1H & AR0H registers from stack
Page
6-33
6-42
6-82
6-160
6-168
6-182
6-200
6-188
6-214
6-210
6-215
6-225
6-319
6-342
6-162
6-223
6-226
6-32
6-267
6-268
6-269

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