Alignment Of 32-Bit Operations - Texas Instruments TMS320C28x Reference Manual

5.11 Alignment of 32-Bit Operations

All 32-bit reads and writes to memory are aligned at the memory interface to
an even address boundary with the least significant word of the 32-bit data
aligned to the even address. The output of the address generation unit does
not force alignment, hence pointer values retain their values. For example:
MOVB AR0,#5 ; AR0 = 5
MOVL *AR0,ACC
; AH −> address 0x000005
; AR0 = 5
The programmer must take the above into account when generating address-
es that are not aligned to an even boundary.
32-bit operands are stored in the following order; low order bits, 0 to 15, fol-
lowed by the high order bits, 16 to 31, on the next highest 16-bit address incre-
ment (little-endian format).
; AL −> address 0x000004
C28x Addressing Modes
Alignment of 32-Bit Operations
5-33