POP AR1H:AR0H
SYNTAX OPTIONS
POP AR1H:AR0H
Operands
AR1H:
AR0H
Description
Flags and
Modes
Repeat
Example
.
.
.
POP
POP XAR7
POP XAR6
POP XAR5
POP XAR4
POP XAR3
POP XAR2
POP AR1H:AR0H
IRET
Pop Top of Stack to Upper Half of Auxiliary Registers
0000 0000 0000 0011
Upper 16-bits of XAR1 and XAR0 auxiliary registers
Predecrement SP by 2. Load the contents of AR0H with the value pointed to
by SP and AR1H with the value pointed to by SP+1. The lower 16 bits of the
auxiliary registers (AR0 and AR1) are left unchanged.
SP
−= 2;
AR0H = [SP];
AR1H = [SP+1];
AR1:AR0 = unchanged;
None
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
XT
OPCODE
; Full context restore for an
; interrupt or trap function
; 32-bit XT restore
; 32-bit XAR7 restore
; 32-bit XAR6 restore
; 32-bit XAR5 restore
; 32-bit XAR4 restore
; 32-bit XAR5 restore
; 32-bit XAR2 restore
; 16-bit AR1H and 16-bit AR0H restore
POP AR1H:AR0H
OBJMODE
RPT
CYC
X
−
1
6-269
Need help?
Do you have a question about the TMS320C28x and is the answer not in the manual?