Texas Instruments TMS320C28x Reference Manual page 514

SUBUL ACC, loc32
SYNTAX OPTIONS
SUBUL ACC, loc32
Operands loc32
ACC
Description
Flags and Z
Modes
N
C
V
OVCU
Repeat
Example
; Subtract two 64-bit values (VarA and VarB) and store result
; in VarC:
MOVL
SUBUL
MOVL
MOVL
SUBBL
MOVL
0101 0110 0101 0101
0000 0000 LLLL LLLL
Addressing mode (see Chapter 5)
Accumulator register
Subtract from the ACC register the 32-bit the location pointed to by the
"loc32" addressing mode. The subtraction is treated as an unsigned SUBL
operation:
ACC = ACC − [loc32];
Note: The difference between a signed and unsigned 32-bit subtract is in the treatment of the
overflow counter (OVC). For a signed SUBL, the OVC counter monitors
positive/negative overflow. For an unsigned SUBL, the OVC unsigned (OVCU) counter
monitors the borrow.
After the subtraction, the Z flag is set if the ACC value is zero, else Z is
cleared.
After the subtraction, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
If the subtraction generates a borrow, C is cleared; otherwise C is set.
If an overflow occurs, V is set; otherwise V is not affected.
The overflow counter is decremented whenever a subtraction operation
generates an unsigned borrow. The OVM mode does not affect the OVCU
counter.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
ACC,@VarA+0
ACC,@VarB+0
@VarC+0,ACC
ACC,@VarA+2
ACC,@VarB+2
@VarC+2,ACC
Subtract Unsigned 32-bit Value
OPCODE
// unsigned subtraction
; Load ACC with contents of the low
; 32-bits of VarA
; Subtract from ACC the contents of
; the low 32-bits of VarB
; Store low 32-bit result into VarC
; Load ACC with contents of the high
; 32-bits of VarA
; Subtract from ACC the contents of
; the high 32-bits of VarB with borrow
; Store high 32-bit result into VarC
SUBUL ACC, loc32
OBJMODE RPT CYC
1 − 1
6-357