Texas Instruments TMS320C28x Reference Manual page 197

ADDUL P,loc32
ADDUL P,loc32
SYNTAX OPTIONS
ADDUL P,loc32
Operands P
loc32
Description
Flags and N
Modes
Z
C
V
OVCU
Repeat
Example
; Add 64-bit VarA + VarB and store result in VarC:
MOVL P,@VarA+0
MOVL ACC,@VarA+2
ADDUL P,@VarB+0
ADDCL ACC,@VarB+2
MOVL @VarC+0,P
MOVL @VarC+2,ACC
6-40
0101 0110 0101 0111
0000 0000 LLLL LLLL
Product register
Addressing mode (see Chapter 5)
Add to the P register the 32-bit content of the location pointed to by the "loc32"
addressing mode. The addition is treated as an unsigned ADD operation:
P = P + [loc32]; // unsigned add
Note: The difference between a signed and unsigned 32-bit add is in the treatment of the
overflow counter (OVC). For a signed ADD, the OVC counter monitors
positive/negative overflow. For an unsigned ADD, the OVC unsigned (OVCU) counter
monitors the carry.
After the addition, if bit 31 of the P register is 1, then set the N flag;
otherwise clear N.
After the addition, if the value of the P register is 0, then set the Z flag;
otherwise clear Z.
If the addition generates a carry, set C; otherwise C is cleared.
If an overflow occurs, V is set; otherwise V is not affected.
The overflow counter is incremented when the addition operation generates
an unsigned carry. The OVM mode does not affect the OVCU counter.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
; Load P with low 32 bits of VarA
; Load ACC with high 32 bits of VarA
; Add to P unsigned low 32 bits of VarB
; Add to ACC with carry high 32 bits of VarB
; Store low 32-bit result into VarC
; Store high 32-bit result into VarC
Add 32-bit Unsigned Value to P
OPCODE OBJMODE RPT CYC
1 − 1