Texas Instruments TMS320C28x Reference Manual page 611

OVC: Overflow counter. OVC is new on the C28x. It can be viewed as
an extension of the accumulator. For signed operations, the OVC
counter is an extension of the overflow mode. For unsigned opera-
tions, the OVC counter (OVCU) is an extension of the carry mode.
DBGM: Debug enable mask bit. DBGM is new on the C28x. It is analo-
gous to the INTM bit and works in cooperation with the DBGIER
register to globally enable interrupts in real-time emulation.
PAGE0 addressing mode configuration bit. The PAGE0 bit is
PAGE0
new on the C28x. It is used for compatibility to the C27x and should
be left as 0 for users moving from the C2xLP to C28x.
VMAP Vector map bit. The VMAP bit is new on the C28x. It determines
from where in memory interrupt vectors will be fetched.
SPA Stack pointer alignment bit. The SPA bit is new on the C28x. It is
a flag used to determine if aligning the stack pointer caused an ad-
justment in the stack pointer address.
LOOP Loop instruction status bit. The LOOP bit is new on the C28x. It
is used in conjunction with the LOOPZ/LOOPNZ instructions.
EALLOW Emulation access enable bit. The EALLOW bit is new on the
C28x. It allows access to the emulation register on the C28x.
IDLESTAT IDLE status bit. The IDLESTAT bit is new on the C28x. It flags an
IDLE condition on the C28x, and is mainly used when returning
from an interrupt.
AMODE Address mode bit. The AMODE bit is new on the C28x. This mode
bit is used to select between C28x addressing mode (AMODE == 0)
and C2xLP addressing mode (AMODE == 1).
OBJMODE Object mode bit. The OBJMODE bit is new on the C28x. It is used
to select between C27x object mode (OBJMODE == 0) and C28x
object mode (OBJMODE == 1). For users moving from C2xLP to
C28x, this bit should always be set to 1.
Note: Upon reset of the C28x, this bit is set to 0 and needs to be changed in
firmware.
M0M1MAP M0 M1 map bit. The M0M1MAP bit is new on the C28x. It is only
used for C27x compatibility. For users transitioning from the C2xLP
to C28x this bit should always be set to 1.
XF XF pin status bit. The XF pin has the same function as on the
C2xLP. Please note that the reset state has changed on the C28x.
ARP Auxiliary register pointer. The ARP has the same functionality as
on the C2xLP. It should, however, only be used when transitioning
code to the C28x. The C28x has enhanced addressing modes
which eliminate the need to keep track of the ARP.
C2xLP and C28x Architectural Differences
Registers
C-9