Texas Instruments TMS320C28x Reference Manual page 299

LSR64 ACC:P,#1..16
LSR64 ACC:P,#1..16
SYNTAX OPTIONS
LSR64 ACC:P,#1..16
Operands ACC:P Accumulator register (ACC) and product register (P)
#1..16
Description
Flags and N
Modes
Z
C
Repeat
Example
; Logical shift right the 64-bit Var64 by 10:
MOVL
MOVL
LSR64 ACC:P,#10
MOVL
MOVL
6-142
Shift value
Logical shift right the 64-bit combined value of the ACC:P registers by the
amount specified in the shift value field. As the value is shifted, the most
significant bits are zero filled and the last bit shifted out is stored in the carry
bit flag:
0
After the shift, if bit 31 of the ACC register is 1 then ACC:P is negative and the
N bit is set; otherwise N is cleared.
After the shift, the Z flag is set if the combined 64-bit value of the ACC:P is
zero; otherwise, Z is cleared.
The last bit shifted out of the combined 64-bit value is loaded into the C bit.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
ACC,@Var64+2
P,@Var64+0
@Var64+2,ACC
@Var64+0,P
OPCODE
0101 0110 1001 SHFT
ACC:P
Right shift
(Immediate value)
ACC:P
; Load ACC with high 32 bits of Var64
; Load P with low 32 bits of Var64
; Logical shift right ACC:P by 10
; Store high 32-bit result into Var64
; Store low 32-bit result into Var64
64-Bit Logical Shift Right
OBJMODE RPT CYC
1 − 1
Last bit out
C
Discard
other bits