Status Register St1, Bits15−8 - Texas Instruments TMS320C28x Reference Manual

Dsp cpu and instruction set
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Figure A−2. Status register ST1, Bits15−8
15
14
0
0
ARP
R/W
XF status bit
XFS output signal low
0
1
XFS output signal is high
Auxiliary register pointer
0
0
0
XAR0 selected
0
0
1
XAR1 selected
0
1
0
XAR2 selected
0
1
1
XAR3 selected
1
0
0
XAR4 selected
1
0
1
XAR5 selected
1
1
0
XAR6 selected
1
1
1
XAR7 selected
13
12
0
0
XF
MOM1MAP
R/W
M0 and M1 mapping mode bit
0
M0 is 0−3FF data, 400−7FF pro-
1
gram
M0 is 0−3FF data and program
SP starts at 0x400.
11
10
0
0
CNF
R
R/W
Address mode bit
0
1
Object compatibility mode bit
0
C27x compatible map
1
C28x/C2xLP compatible map
C2xLP-mapping mode bit
0
PAGE0 stack addressing mode
1
PAGE0 direct addressing mode
Register Quick Reference
Register Figures
9
8
É É É É É
0
0
É É É É É
OBJMODE
AMODE
É É É É É
R/W
R/W
C28x/C27x processing mode
C2xLP addressing modes
A-5

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