Texas Instruments TMS320C28x Reference Manual page 494

SUB ACC,#16bit << #0..15
SYNTAX OPTIONS
SUB ACC,#16bit << #0..15
ACC
Operands
#16bit
#0..15
Description
Z
Flags and g
Modes N
C
V
OVC
SXM
OVM
Repeat
Example
; Calculate signed value: ACC = (VarB << 10) − (23 << 6);
SETC
MOV
SUB
Accumulator register
16-bit immediate constant value
Shift value (default is "<< #0" if no value specified)
Subtract the left shifted 16-bit immediate constant value from the ACC
register. The shifted value is sign extended if sign extension mode is turned
on (SXM=1) else the shifted value is zero extended (SXM=0). The lower bits
of the shifted value are zero filled:
if(SXM = 1)
ACC = ACC − S:16bit << shift value;
else
ACC = ACC − 0:16bit << shift value;
Smart Encoding:
If #16bit is an 8-bit number and the shift is zero, then the assembler will
encode this instruction as SUBB ACC, #8bit for improved efficiency. To
override this encoding, use the SUBW ACC, #16bit instruction alias.
After the subtraction, the Z flag is set if ACC is zero, else Z is cleared.
After the subtraction, the N flag is set if bit 31 of the ACC is 1, N is cleared.
If the subtraction generates a borrow, C is cleared; otherwise C is set.
If an overflow occurs, V is set; otherwise V is not affected.
If(OVM = 0, disabled) then if the operation generates a positive overflow,
then the counter is incremented and if the operation generates a negative
overflow, then the counter is decremented. If(OVM = 1, enabled) then the
counter is not affected by the operation.
If sign extension mode bit is set; then the 16-bit operand, addressed by the
"loc16" field, will be sign extended before the addition. Else, the value will be
zero extended.
If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
SXM
ACC,@VarB << #10
ACC,#23 << #6
Subtract Shifted Value From Accumulator
OPCODE
1111 1111 0000 SHFT
CCCC CCCC CCCC CCCC
// sign extension mode enabled
// sign extension mode disabled
; Turn sign extension mode on
; Load ACC with VarB left shifted by 10
; Subtract from ACC 23 left shifted by 6
SUB ACC,#16bit << #0..15
OBJMODE RPT CYC
X − 1
6-337