Texas Instruments TMS320C28x Reference Manual page 367

MOVL loc32, XARn
MOVL loc32, XARn
SYNTAX OPTIONS
MOVL loc32, XAR0
MOVL loc32, XAR1
MOVL loc32, XAR2
MOVL loc32, XAR3
MOVL loc32, XAR4
MOVL loc32, XAR5
MOVL loc32, XAR6
MOVL loc32, XAR7
Operands loc32
XARn
Description
Flags and N
Modes
Z
Repeat
Example
MOVL
MOVL
MOVL
MOVL
6-210
Addressing mode (see Chapter 5)
XAR0 to XAR7, 32-bit auxiliary registers
Load the contents of the 32-bit addressed location with the contents of
XARn:
[loc32] = XARn;
If (loc32 = @ACC), then the load to ACC is tested for a negative condition.
Bit-31 of the ACC register is the sign bit, 0 for positive, 1 for negative. The
negative flag bit is set if the operation on the ACC register generates a
negative value, otherwise it is cleared.
If (loc32 = @ACC), then the load to ACC is tested for a zero condition. The bit
is set if the result of the operation on the ACC register generates a 0 value,
otherwise it is cleared
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
@ACC, XAR0 ; Move the 32-bit contents of XAR0 into ACC.
; If bit 31 of the
; ACC = 0, set Z.
*XAR1, XAR7 ; Move the 32-bit contents of XAR7 into the
; location pointed to by XAR1.
*XAR6++,XAR6 ; Move the 32-bit contents of XAR6 into the
; location pointed to by XAR6. Post-increment
; the contents of XAR6.
*−−XAR5,XAR5 ; Predecrement the contents of XAR5. Move the
; 32-bit contents of XAR5 into the location
; pointed to by ; XAR5.
OPCODE
0011 1010 LLLL LLLL
1011 0010 LLLL LLLL
1010 1010 LLLL LLLL
1010 0010 LLLL LLLL
1010 1000 LLLL LLLL
1010 0000 LLLL LLLL
1100 0010 LLLL LLLL
1100 0011 LLLL LLLL
ACC is 1 set N. If
Store 32-bit Auxiliary Register
OBJMODE RPT
1 −
1 −
1 −
1 −
1 −
1 −
X −
X −
CYC
1
1
1
1
1
1
1
1