Texas Instruments TMS320C28x Reference Manual page 198

Dsp cpu and instruction set
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ADDUL ACC, loc32
SYNTAX OPTIONS
ADDUL ACC, loc32
Operands
ACC
loc32
Description
Flags and
Z
Modes
N
C
V
OVCU
Repeat
Example
; Add two 64-bit values (VarA and VarB) and store result in VarC:
MOVL
ADDUL ACC,@VarB+0
MOVL
MOVL
ADDCL ACC,@VarB+2
MOVL
Accumulator register
Addressing mode (see Chapter 5)
Add to the ACC register the unsigned 32-bit content of the location pointed to
by the "loc32" addressing mode:
ACC = ACC + [loc32];
Note:
The difference between a signed and unsigned 32-bit add is in the treatment of the
overflow counter (OVC). For a signed ADD, the OVC counter monitors
positive/negative overflow. For an unsigned ADD, the OVC unsigned (OVCU) counter
monitors the carry.
After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
After the addition, the N flag is set if bit 31 of the ACC is 1, else N is
cleared.
If the addition generates a carry, C is set; otherwise C is cleared.
If an overflow occurs, V is set; otherwise V is not affected.
The overflow counter is incremented when the addition operation generates
an unsigned carry. The OVM mode does not affect the OVCU counter.
If this operation is repeated, then the instruction will be executed N+1 times.
The state of the Z, N, C flags will reflect the final result. The V flag will be set if
an intermediate overflow occurs. The OVCU will count intermediate carries.
ACC,@VarA+0
@VarC+0,ACC
ACC,@VarA+2
@VarC+2,ACC
Add 32-bit Unsigned Value to Accumulator
OPCODE
0101 0110 0101 0011
xxxx xxxx LLLL LLLL
// unsigned add
; Load ACC with contents of the low
; 32 bits of VarA
; Add to ACC the contents of the low
; 32 bits of VarB
; Store low 32-bit result into VarC
; Load ACC with contents of the high
; 32 bits of VarA
; Add to ACC the contents of the high
; 32 bits of VarB with carry
; Store high 32-bit result into VarC
ADDUL ACC, loc32
OBJMODE
RPT
CYC
1
Y
N+1
6-41

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