Texas Instruments TMS320C28x Reference Manual page 479

Dsp cpu and instruction set
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SETC M0M1MAP
SETC M0M1MAP
SYNTAX OPTIONS
SETC M0M1MAP
Operands
M0M1MAP
Description
M0M1MAP bit
0
(C27x)
1
(C28x/C2XLP)
Note:
The pipeline is flushed when this instruction is executed.
Flags and
M0M1MAP
Modes
Repeat
Example
; Set the device mode from reset to C28x:
Reset:
SETC
CLRC
.c28_amode
SETC
6-322
Status bit
Set the M0M1MAP status bit, configuring the mapping of the M0 and M1
memory blocks for C28x/C2XLP operation. The memory blocks are
mapped as follows:
Data Space
M0: 0x000 to 0x3FF
M1: 0x400 to 0x7FF
The M0M1MAP bit is set.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
OBJMODE
; Enable C28x Object Mode
AMODE
; Enable C28x Address Mode
; Tell assembler we are in C28x address mode
M0M1MAP
; Enable C28x Mapping Of M0 and M1 blocks
.
.
OPCODE
0101 0110 0001 1010
M0: 0x000 to 0x3FF
M1: 0x400 to 0x7FF
Set the M0M1MAP Status Bit
OBJMODE
RPT
X
Program Space
M0: 0x400 to 0x7FF
M1: 0x000 to 0x3FF
CYC
5

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