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TMS320C28 series
Texas Instruments TMS320C28 series Manuals
Manuals and User Guides for Texas Instruments TMS320C28 series. We have
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Texas Instruments TMS320C28 series manuals available for free PDF download: Student Manual, Reference Manual, User Manual
Texas Instruments TMS320C28 series Student Manual (342 pages)
DSP Design Workshop
Brand:
Texas Instruments
| Category:
Computer Hardware
| Size: 9 MB
Table of Contents
Section 1
6
Important Notice
2
Revision History
2
Architecture Overview
4
Table of Contents
6
Module Topics
6
What Is the Tms320C28X
7
C28X CPU
8
Multiplier, ALU, and Shifters
9
Tms320C28X Internal Bussing
10
Special Instructions
11
Pipeline Advantage
12
Memory
13
Memory Map
13
Code Security Module (CSM)
14
Peripherals
14
Fast Interrupt Response
15
C28 Mode
16
Reset
17
Summary
18
Section 2
20
Module Topics
20
Code Composer Studio
21
Software Development and COFF Concepts
21
Programming Development Environment
21
Projects
23
Build Options
24
Creating a Linker Command File
27
Sections
27
Linker Command Files (.CMD)
30
Memory-Map Description
30
Section Placement
32
Exercise 2A
33
Summary: Linker Command File
34
Lab 2A: Linker Command File
35
DSP/BIOS Configuration Tool
39
Lab 2B: DSP/BIOS Configuration Tool
44
Solutions
48
Section 3
50
Module Topics
50
Traditional and Structure Approach to C Coding
51
Naming Conventions
54
Example of Peripheral Structure .H File
55
Mapping Structures to Memory
56
Linker Command File
56
F281X C-Code Header Files
57
Definition Files
58
Global Variable Definition File
59
Peripheral Specific Routines
60
Example Usage Flow
61
Summary
63
Section 4
66
Module Topics
66
Core Interrupt Lines
67
Reset
67
Reset - Bootloader
69
Interrupt Sources
71
Interrupt Processing
71
Peripheral Interrupt Expansion (PIE)
73
PIE Interrupt Vector Table
74
Interrupt Response and Latency
77
System Initialization
79
Section 5
80
Module Topics
80
Oscillator/Pll Clock Module
81
Watchdog Timer
83
Low Power Modes
87
General-Purpose Digital I/O
89
EALLOW Protected Registers
92
Lab 5: System Initialization
93
Section 6
98
Module Topics
98
Analog-To-Digital Converter
99
Analog-To-Digital Converter
100
Analog-To-Digital Converter Registers
101
Example - Sequencer "Start/Stop" Operation
106
ADC Conversion Result Buffer Register
107
Numerical Format
108
Lab 6: Analog-To-Digital Converter
109
Section 7
116
Event Manager
117
PWM Review
118
GP Timer Modes of Operation
124
GP Timer Registers
126
Asymmetric and Symmetric PWM Via General Purpose Timer Compares
130
GP Timer Compare PWM Exercise
131
Compare Unit Registers
133
Hardware Dead-Band (Compare Units Only)
136
Power Drive Protection
139
Capture Units
141
Quadrature Encoder Pulse (QEP)
146
QEP Initialization with GP Timer 2 (EVA)
148
Lab 7: Event Manager
150
GP Timer Compare PWM Exercise Solution
156
Section 8
158
Numbering System Basics
159
Two's Complement Numbers
159
Sign Extension Mode
161
Binary Multiplication
162
Binary Fractions
164
Multiplying Binary Fractions
165
Fraction Coding
167
Fractional Vs. Integer Representation
168
Iqmath
169
Floating-Point Representation
170
IQ Fractional Representation
171
Traditional "Q" Math Approach
173
Iqmath Approach
177
Iqmath Library
180
AC Induction Motor Example
182
Iqmath Appications and Summary
189
Converting ADC Results into IQ Format
191
Lab 8: Iqmath FIR Filter
192
Section 9
198
Introduction to DSP/BIOS
199
Scheduling DSP/BIOS Threads
201
Periodic Functions
208
Real-Time Analysis Tools
209
DSP/BIOS API Module and Summary
210
Section 10
220
External Interface (XINTF)
225
Flash Configuration and Memory Performance
228
Flash Programming
231
Code Security Module (CSM)
233
Lab 10: Programming the Flash
237
Section 11
246
Communications
247
Communications Techniques
247
Serial Peripheral Interface (SPI)
248
Spi Block Diagram
249
SPI Registers
251
Serial Communications Interface (SCI)
255
Multiprocessor Wake-Up Modes
258
Multi-Channel Buffered Serial Port (Mcbsp)
261
Enhanced Controller Area Network (Ecan)
264
CAN Bus and Node
265
Principles of Operation
266
Message Format and Block Diagram
267
Development Support
269
Section 12
274
Appendix Ezdsp F2812
275
P2 - Expansion Interface
276
P4 / P8 / P7 - I/O Interface
277
P5 / P9 - Analog Interface
279
Ezdsp™ F2812 Jumper Diagram
280
JP1 - Xmp/Mcn Select
280
JP2 - Flash Programming Voltage Select
280
DS1 / DS2 - Leds
281
JP7 / JP8 / JP11 / JP12 - Boot Mode Select
281
JP9 - PLL Disable
281
TP1 / TP2 - Test Points
282
Addressing Modes
286
Instruction Formats
287
Register Addressing
288
Immediate Addressing
289
Direct Addressing
290
Indirect Addressing
292
Section 13
302
Program Control
303
Branches
303
Program Control Instructions
304
ALU and Accumulator Operations
306
Simple Math & Shift
307
Multiplier
309
Basic Multiplier
310
Repeat Instruction
311
MAC Instruction
312
Data Move
313
Logical Operations
315
Byte Operations and Addressing
315
Test and Change Memory Instructions
316
Read Modify Write Operations
318
Lab C: Assembly Programming
320
OPTIONAL Lab C-C: Sum-Of-Products in C
322
Linking Boot Code from Rts2800.Lib
325
Set up the Stack
326
Accessing Interrupts / Status Register
328
Using Embedded Assembly
329
Using Pragma
330
Optimization Levels
331
Volatile Usage
333
Compiler Advanced Options
334
Optimization Tips Summary
335
Lab D: C Optimization
336
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Texas Instruments TMS320C28 series Reference Manual (139 pages)
Floating Point Unit and Instruction Set
Brand:
Texas Instruments
| Category:
Controller
| Size: 1 MB
Table of Contents
Table of Contents
3
Preface
5
1 Introduction
7
Introduction to the Central Processing Unit (CPU)
8
Compatibility with the C28X Fixed-Point CPU
8
FPU Functional Block Diagram
8
1.2.1 Floating-Point Code Development
9
Components of the C28X Plus Floating-Point CPU
9
1.3.1 Emulation Logic
10
1.3.2 Memory Map
10
1.3.3 On-Chip Program and Data
10
1.3.4 CPU Interrupt Vectors
10
Memory Interface
10
1.4.1 Address and Data Buses
11
1.4.2 Alignment of 32-Bit Accesses to Even Addresses
11
2 CPU Register Set
13
CPU Registers
14
C28X with Floating-Point Registers
14
Floating-Point Status Register (STF)
16
Floating-Point Unit Status Register (STF)
16
Floating-Point Unit Status (STF) Register Field Descriptions
16
Repeat Block Register (RB)
18
3 Pipeline
21
Pipeline Overview
22
General Guidelines for Floating-Point Pipeline Alignment
22
FPU Pipeline
22
Moves from FPU Registers to C28X Registers
23
Moves from C28X Registers to FPU Registers
23
Parallel Instructions
24
Invalid Delay Instructions
24
Optimizing the Pipeline
27
4 Instruction Set
29
Instruction Descriptions
30
Operand Nomenclature
30
32
Instructions
32
Summary of Instructions
32
ABSF32 Rah, Rbh 32-Bit Floating-Point Absolute Value
34
ADDF32 Rah, #16Fhi, Rbh 32-Bit Floating-Point Addition
35
ADDF32 Rah, Rbh, #16Fhi 32-Bit Floating-Point Addition
37
ADDF32 Rah, Rbh, Rch 32-Bit Floating-Point Addition
39
ADDF32 Rdh, Reh, Rfh MOV32 Mem32, Rah 32-Bit Floating-Point Addition with Parallel Move
40
ADDF32 Rdh, Reh, Rfh MOV32 Rah, Mem32 32-Bit Floating-Point Addition with Parallel Move
42
CMPF32 Rah, Rbh 32-Bit Floating-Point Compare for Equal, Less than or Greater than
44
CMPF32 Rah, #16Fhi 32-Bit Floating-Point Compare for Equal, Less than or Greater than
45
CMPF32 Rah, #0.0 32-Bit Floating-Point Compare for Equal, Less than or Greater than
46
EINVF32 Rah, Rbh 32-Bit Floating-Point Reciprocal Approximation
47
EISQRTF32 Rah, Rbh 32-Bit Floating-Point Square-Root Reciprocal Approximation
49
F32TOI16 Rah, Rbh Convert 32-Bit Floating-Point Value to 16-Bit Integer
51
F32TOI16R Rah, Rbh Convert 32-Bit Floating-Point Value to 16-Bit Integer and Round
52
F32TOI32 Rah, Rbh Convert 32-Bit Floating-Point Value to 32-Bit Integer
53
F32TOUI16 Rah, Rbh Convert 32-Bit Floating-Point Value to 16-Bit Unsigned Integer
54
F32TOUI16R Rah, Rbh Convert 32-Bit Floating-Point Value to 16-Bit Unsigned Integer and Round
55
F32TOUI32 Rah, Rbh Convert 32-Bit Floating-Point Value to 16-Bit Unsigned Integer
56
FRACF32 Rah, Rbh Fractional Portion of a 32-Bit Floating-Point Value
57
I16TOF32 Rah, Rbh Convert 16-Bit Integer to 32-Bit Floating-Point Value
58
I16TOF32 Rah, Mem16 Convert 16-Bit Integer to 32-Bit Floating-Point Value
59
I32TOF32 Rah, Mem32 Convert 32-Bit Integer to 32-Bit Floating-Point Value
60
I32TOF32 Rah, Rbh Convert 32-Bit Integer to 32-Bit Floating-Point Value
61
MACF32 R3H, R2H, Rdh, Reh, Rfh 32-Bit Floating-Point Multiply with Parallel Add
62
Move
64
MACF32 R7H, R3H, Mem32, *XAR7++ 32-Bit Floating-Point Multiply and Accumulate
66
MACF32 R7H, R6H, Rdh, Reh, Rfh 32-Bit Floating-Point Multiply with Parallel Add
68
Move
70
MAXF32 Rah, Rbh 32-Bit Floating-Point Maximum
72
MAXF32 Rah, #16Fhi 32-Bit Floating-Point Maximum
73
MAXF32 Rah, Rbh MOV32 Rch, Rdh 32-Bit Floating-Point Maximum with Parallel Move
74
MINF32 Rah, Rbh 32-Bit Floating-Point Minimum
75
MINF32 Rah, #16Fhi 32-Bit Floating-Point Minimum
76
MINF32 Rah, Rbh MOV32 Rch, Rdh 32-Bit Floating-Point Minimum with Parallel Move
77
MOV16 Mem16, Rah Move 16-Bit Floating-Point Register Contents to Memory
78
MOV32 *(0:16Bitaddr), Loc32 Move the Contents of Loc32 to Memory
79
MOV32 ACC, Rah Move 32-Bit Floating-Point Register Contents to ACC
80
MOV32 Loc32, *(0:16Bitaddr) Move 32-Bit Value from Memory to Loc32
81
MOV32 Mem32, Rah Move 32-Bit Floating-Point Register Contents to Memory
82
MOV32 Mem32, STF Move 32-Bit STF Register to Memory
83
MOV32 P, Rah Move 32-Bit Floating-Point Register Contents to P
84
MOV32 Rah, ACC Move the Contents of ACC to a 32-Bit Floating-Point Register
85
MOV32 Rah, Mem32 {, CNDF} Conditional 32-Bit Move
86
MOV32 Rah, P Move the Contents of P to a 32-Bit Floating-Point Register
88
MOV32 Rah, Rbh {, CNDF} Conditional 32-Bit Move
89
MOV32 Rah, Xarn Move the Contents of Xarn to a 32-Bit Floating-Point Register
90
MOV32 Rah, XT Move the Contents of XT to a 32-Bit Floating-Point Register
91
MOV32 STF, Mem32 Move 32-Bit Value from Memory to the STF Register
92
MOV32 Xarn, Rah Move 32-Bit Floating-Point Register Contents to Xarn
93
MOV32 XT, Rah Move 32-Bit Floating-Point Register Contents to XT
94
MOVD32 Rah, Mem32 Move 32-Bit Value from Memory with Data Copy
95
MOVF32 Rah, #32F Load the 32-Bits of a 32-Bit Floating-Point Register
96
MOVI32 Rah, #32Fhex Load the 32-Bits of a 32-Bit Floating-Point Register with the Immediate
97
MOVIZ Rah, #16Fhihex Load the Upper 16-Bits of a 32-Bit Floating-Point Register
98
MOVIZF32 Rah, #16Fhi Load the Upper 16-Bits of a 32-Bit Floating-Point Register
99
MOVST0 FLAG Load Selected STF Flags into ST0
100
MOVXI Rah, #16Flohex Move Immediate to the Low 16-Bits of a Floating-Point Register
101
MPYF32 Rah, Rbh, Rch 32-Bit Floating-Point Multiply
102
MPYF32 Rah, #16Fhi, Rbh 32-Bit Floating-Point Multiply
103
MPYF32 Rah, Rbh, #16Fhi 32-Bit Floating-Point Multiply
104
MPYF32 Rah, Rbh, Rch ADDF32 Rdh, Reh, Rfh 32-Bit Floating-Point Multiply with Parallel Add
105
MPYF32 Rdh, Reh, Rfh MOV32 Rah, Mem32 32-Bit Floating-Point Multiply with Parallel Move
107
MPYF32 Rdh, Reh, Rfh MOV32 Mem32, Rah 32-Bit Floating-Point Multiply with Parallel Move
109
MPYF32 Rah, Rbh, Rch SUBF32 Rdh, Reh, Rfh 32-Bit Floating-Point Multiply with Parallel Subtract
110
NEGF32 Rah, Rbh{, CNDF} Conditional Negation
111
POP RB Pop the RB Register from the Stack
112
PUSH RB Push the RB Register Onto the Stack
113
RESTORE Restore the Floating-Point Registers
114
RPTB Label, Loc16 Repeat a Block of Code
116
RPTB Label, #RC Repeat a Block of Code
118
SAVE FLAG, VALUE Save Register Set to Shadow Registers and Execute SETFLG
120
SETFLG FLAG, VALUE Set or Clear Selected Floating-Point Status Flags
122
SUBF32 Rah, Rbh, Rch 32-Bit Floating-Point Subtraction
123
SUBF32 Rah, #16Fhi, Rbh 32-Bit Floating Point Subtraction
124
SUBF32 Rdh, Reh, Rfh MOV32 Rah, Mem32 32-Bit Floating-Point Subtraction with Parallel Move
125
SUBF32 Rdh, Reh, Rfh MOV32 Mem32, Rah 32-Bit Floating-Point Subtraction with Parallel Move
127
SWAPF Rah, Rbh{, CNDF} Conditional Swap
128
TESTTF CNDF Test STF Register Flag Condition
129
UI16TOF32 Rah, Mem16 Convert Unsigned 16-Bit Integer to 32-Bit Floating-Point Value
130
UI16TOF32 Rah, Rbh Convert Unsigned 16-Bit Integer to 32-Bit Floating-Point Value
131
UI32TOF32 Rah, Mem32 Convert Unsigned 32-Bit Integer to 32-Bit Floating-Point Value
132
UI32TOF32 Rah, Rbh Convert Unsigned 32-Bit Integer to 32-Bit Floating-Point Value
133
ZERO Rah Zero the Floating-Point Register Rah
134
ZEROA Zero All Floating-Point Registers
135
Changes
137
Revision History
137
Technical Changes Made in this Revision
137
A.1 Changes
137
Texas Instruments TMS320C28 series User Manual (76 pages)
Floating Point Unit DSP Library
Brand:
Texas Instruments
| Category:
Motherboard
| Size: 0 MB
Table of Contents
Copyright
2
Revision Information
2
Table of Contents
3
1 Introduction
5
2 Library Structure
6
Build Options Used to Build the Library
7
Header Files
7
A Note about C Functions and Iqmath
8
Complex Fast Fourier Transform
12
Complex Fast Fourier Transform (Unaligned)
15
Complex Fast Fourier Transform Magnitude
17
Complex Fast Fourier Transform Magnitude (Scaled)
19
Complex Fast Fourier Transform Phase
21
Complex Fast Fourier Transform Twiddle Factors
23
Inverse Complex Fast Fourier Transform
25
Real Fast Fourier Transform
28
Real Fast Fourier Transform (Unaligned)
31
Real Fast Fourier Transform with ADC Input
33
Real Fast Fourier Transform with ADC Input (Unaligned)
36
Real Fast Fourier Transform Magnitude
38
Real Fast Fourier Transform Magnitude (Scaled)
40
Real Fast Fourier Transform Phase
42
Real Fast Fourier Transform Twiddle Factors
44
Finite Impulse Response Filter
46
Absolute Value of a Complex Vector
50
Absolute Value of an Even Length Complex Vector
51
Addition (Element-Wise) of a Complex Scalar to a Complex Vector
52
Addition of Two Complex Vectors
53
Inverse Absolute Value of a Complex Vector
54
Inverse Absolute Value of an Even Length Complex Vector
55
Index of Maximum Value of an Even Length Real Array
56
Mean of Real and Imaginary Parts of a Complex Vector
57
Median of a Real Valued Array of Floats (Preserved Inputs)
58
Median of a Real Array of Floats
60
Complex Multiply of Two Floating Point Numbers
61
Complex Multiply of Two Complex Vectors
62
Multiplication of a Complex Vector and the Complex Conjugate of Another Vector
63
Multiplication of a Real Scalar and a Real Vector
64
Multiplication of a Real Scalar, a Real Vector, and Another Real Vector
65
Multiplication of a Real Vector and a Complex Vector
66
Multiplication of a Real Vector and a Real Vector
67
Sort an Array of Floats
68
Rounding (Unbiased) of a Floating Point Scalar
69
Subtraction of a Complex Scalar from a Complex Vector
70
Subtraction of a Complex Vector and Another Complex Vector
71
Fast Square Root
72
Optimized Memory Copy
73
Optimized Memory Set
74
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