Texas Instruments TMS320C28x Reference Manual page 484

Dsp cpu and instruction set
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SPM shift
SYNTAX OPTIONS
SPM +1
SPM 0
SPM −1
SPM −2
SPM −3
SPM −4 (Valid only when AMODE = 0)
SPM +4 (Valid only when AMODE = = 1)
SPM −5
SPM −6
Operands
shift
Description
PM Bits
000
001
010
011
100
101
110
111
Flags and
PM
Modes
Repeat
1111 1111 0110 1000
1111 1111 0110 1001
1111 1111 0110 1010
1111 1111 0110 1011
1111 1111 0110 1100
1111 1111 0110 1101
1111 1111 0110 1110
1111 1111 0110 1111
Product shift mode (+4, +1, 0, −1, −2, −3, −4, −5, −6)
Specify a product shift mode. A negative value indicates an arithmetic right
shift; positive numbers indicate a logical left shift. The following table shows
the relationship between the "shift" operand and the 3-bit value that gets
loaded into the product shift mode (PM) bits in ST0. The address mode bit
(AMODE) selects between two types of shift decodes as shown in the table
below:
AMODE = 1
SPM +1
SPM 0
SPM −1
SPM −2
SPM −3
SPM +4
SPM −5
SPM −6
PM is loaded with the 3-bit value specified by the selected "shift" value.
This instruction is repeatable. If the operation follows a RPT instruction, then
the SFR instruction will be executed N+1 times. The state of the Z, N and C
flags will reflect the final result.
Set Product Mode Shift Bits
OPCODE
OBJMODE
SPM shift
RPT
CYC
X
1
X
1
X
1
X
1
X
1
X
1
X
1
X
1
AMODE = 0
SPM +1
SPM 0
SPM −1
SPM −2
SPM −3
SPM −4
SPM −5
SPM −6
6-327

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