Pipelining of Instructions
Example 4−1. Relationship Between Pipeline and Address Counters FC, IC, and PC
IC
00 0051
16
00 0053
16
00 0055
16
00 0057
16
00 0059
16
00 005B
16
Instruction 11
00 005D
16
4-6
Program memory (32 bits wide)
Instruction 2
Instruction 1
Instruction 3
Instruction 5
Instruction 4
Instruction 7
Instruction 6
Instruction 8
Instruction 9
Instruction 10
.
.
.
F1: Instructions 4 and 5
F2: Instruction 3
D1: Instruction 2
D2: Instruction 1
The remainder of this document refers almost exclusively to the PC. The FC
and the IC are visible in only limited ways. For example, when a call is executed
or an interrupt is initiated, the IC value is saved to the stack or to auxiliary regis-
ter XAR7.
00 0050
16
00 0052
16
00 0054
16
00 0056
16
00 0058
16
00 005A
16
00 005C
16
.
.
.
Instruction-fetch queue (32 bits wide)
Instruction 2
Instruction register (32 bits wide)
I C
FC
Instruction 3
Instruction 1
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