Instructions That Affect Ovc/Ovcu - Texas Instruments TMS320C28x Reference Manual

Table 2−4. Instructions That Affect OVC/OVCU
Signed Addition Instructions
ADD ACC,loc16 << shift
ADD ACC,#16bit << shift
ADD ACC,loc16 << T
ADD loc16,#16bitSigned
ADDB ACC,#8bit
ADDCL ACC,loc32
ADDCU ACC,loc16
ADDL ACC,loc32
ADDL loc32,ACC
ADDU ACC,loc16
DMAC ACC:P,loc32,*XAR7/++
INC loc16
MAC P,loc16,*XAR7/++
MAC P,loc16,0:pma
MOVA T,loc16
MOVAD T,loc16
MPYA P,loc16,#16bit
MPYA P,T,loc16
QMACL P,loc32,*XAR7/++
QMPYAL P,XT,loc32
SQRA loc16
XMAC P,loc16,*(pma)
XMACD P,loc16,*(pma)
Signed Subtraction Instructions
DEC loc16
MOVS T,loc16
Status Register (ST0)
Effect on OVC/OVCU
if(OVM == 0) Inc OVC on +ve signed
overflow
Effect on OVC/OVCU
if(OVM == 0) Dec OVC on −ve signed
overflow
Central Processing Unit 2-17