ABB RELION REX640 Technical Manual page 1269

1MRS759142 F
Weak-end trip logic
Weak-end trip logic is activated if it receives an enable signal from Level detector
and ECHO output of Echo logic is activated. Then a general trip signal OPR_WEI is
activated. The activation of the CB_OPEN input blocks the tripping.
The OPR_WEI output can be blocked by activating the BLOCK input.
5.12.6 Application
Current reversal logic
In parallel feeder applications, when the overreaching permissive communication
schemes are used, unselective tripping may result due to the current reversal. Such
a condition can occur in the healthy feeder when the fault is cleared in the faulty
feeder. The tripping of the healthy parallel feeder may lead to losing the connection
between the two buses. To avoid this situation, the current reversal logic (transient
blocking logic) can be used.
Assume that Relay A1, Relay A2, Relay B1 and Relay B2 are equipped with DSOCPSCH
and the permissive overreach scheme is enabled. A fault occurs at Feeder 1 close to
bus B. Relay A2 at the healthy Feeder 2 recognizes the fault in the forward direction
within the overreaching zone Z2 and sends a CS signal to Relay B2 according to
the POTT scheme. Relay B2 does not recognize the fault in the forward direction
and does not operate even though a permissive CR signal is received from Relay A2.
Moreover, Relay B2 does not send a permissive signal to Relay A2.
Figure 719: The fault occurs at one of the parallel lines.
The faulty feeder (Feeder 1) is not simultaneously tripped at both ends and it might
occur that, for example, the circuit breaker closer to the fault at Relay B1 is tripped
faster than the breaker at bus A due to the direct operation of the zone Z1 of Relay
REX640
Technical Manual
Protection related functions
1269