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Figure 5-1. Status Registers
The STATus:PRESet command clears all event registers and sets all bits in the
event enable registers. Use the *CLS common command to clear all event regis-
ters and all queues except the output queue. If *CLS is sent immediately fol-
lowing a program message terminator, the output queue is also cleared. In
addition, the request for the *OPC bit is also cleared.
Status Byte
The Status Byte contains summary bits that monitor activity in the other sta-
tus registers and queues. The register's bits are set and cleared by summary
bits from other registers or queues. If a bit in the Status Byte goes high, query
the value of the source register to determine the cause.
Command
GPIB serial poll command
*STB? common command
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Use
Returns the status byte value. Reads bit 6 as the
Request Service (RQS) bit and clears the bit
which clears the SRQ interrupt.
Returns the status byte value. Reads bit 6 as the
Master Summary Status (MSS) and does not
clear the bit or have any effect on the SRQ inter-
rupt.
Remote Operation
Monitoring the Instrument
5-21
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