Fibrechannel; Ethernet; Infiniband; Figure 3-15: User_Mode / Fibre_Channel Mode - Xilinx RocketIO User Manual

R

FIBRECHANNEL

The Fibre Channel CRC is similar to the USER_MODE CRC
exception: In FibreChannel, SOP and EOP are the protocol delimiters, while USER_MODE
uses the two attributes CRC_START_OF_PKT and CRC_END_OF_PKT to define SOP and
EOP. Both USER_MODE and Fibre Channel, however, disregard the SOP and EOP in CRC
computation.
Designs should generate only the EOF frame delimiter for a beginning running disparity
(RD) that is negative; these are the frame delimiters that begin with /K28.5/D21.4/ or
/K28.5/D10.4/. Never generate the EOF frame delimiter for a beginning RD that is
positive; these are the frame delimiters that begin with /K28.5/D21.5/ or /K28.5/D10.5/.
When the RocketIO CRC determines that the running disparity must be inverted to satisfy
Fibre Channel requirements, it will convert the second byte of the EOF frame delimiter
(D21.4 or D10.4) to the value required to invert the running disparity (D21.5 or D10.5).

ETHERNET

The Ethernet CRC is more complex
neglected by the CRC. The extension bytes are special "K" characters in special cases. The
extension bytes are untouched by the CRC as are the Trail bits, which are added to
maintain packet length.
SOP Preamble
n Bytes
Designs should generate only the /K28.5/D16.2/ idle sequence for transmission, never
/K28.5/D5.6/. When the RocketIO CRC determines that the running disparity must be
inverted to satisfy Gigabit Ethernet requirements, it will convert the first /K28.5/D16.2/
idle following a packet to /K28.5/D5.6/, performing the necessary conversion.

INFINIBAND

The Infiniband CRC is the most complex mode, and is not supported in the CRC generator.
Infiniband CRC contains two computation types: an invariant 32-bit CRC, the same as in
Ethernet protocol; and a variant 16-bit CRC, which is not supported in the hard core.
Infiniband CRC must be implemented entirely in the FPGA fabric.
72
SOP
RXCHECKINGCRC
RXCRCERR

Figure 3-15: USER_MODE / FIBRE_CHANNEL Mode

SOF DATA

Figure 3-16: Ethernet Mode

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Chapter 3: Digital Design Considerations
DATA R R
0 1
(Figure 3-16). The SOP, EOP, and Preamble are
Pad Bits R 0 R 1
2 to 3 Bytes
1-800-255-7778
(Figure 3-15) with one
R R EOP
2 3
R 2 R 3 EOP Trail Bits
UG024_13_101602
UG024 (v1.5) October 16, 2002
RocketIO™ Transceiver User Guide
UG024_12_020802