Keithley 2450 Reference Manual page 828

Model 2450 Interactive SourceMeter® Instrument Reference Manual
Status Byte Register diagram
The Status Byte Register consists of two 8-bit registers that control service requests, the Status Byte
Register and the Service Request Enable Register. These registers are shown in the following figure.
The bits in the Status Byte Register are described in the following table.
Bit
0
1
2
3
4
5
6
7
2450-901-01 Rev. B/September 2013
Figure 152: Model 2450 Status Byte Register
Decimal Bit name
value
1 Measurement summary Bit (MSB)
2 Not used
4 Error available (EAV)
8 Questionable summary bit (QSB)
16 Message available (MAV)
32 Event summary bit (ESB)
64 Request for service (RQS)/Master summary
status (MSS)
128 Operation summary bit (OSB)
Appendix C: Status model
When set, indicates the following
has occurred:
An enabled questionable event
Not applicable
An error is present in the error queue
(warning and information messages do
not affect this bit)
An enabled questionable event
A response message is present in the
output queue
An enabled standard event
An enabled summary bit of the Status
Byte Register is set; depending on
how it is used, this is either the
Request for Service (RQS) bit or the
Master Summary Status (MSS) bit
An enabled operation event
C-11