Figure 3.5.1 Block Diagram Of External Reset Pin; Table 3.5.1 Reset Source And Reset Output (Optional) - Fujitsu F2MC-8L MB89620 Series Hardware Manual

3.5 Resets
3.5.1 External Reset Pin
Inputting an "L" level to the external reset pin generates a reset. If products are set to
with the reset output (optional), the pin outputs an "L" level depending on internal
reset sources.
n Block Diagram of External Reset Pin
The external reset pin (RST) on products with the reset output is a hysteresis input type and N-
ch open-drain output type with a pull-up resistor.
The external reset pin on products without a reset output option is only for the reset input.
Figure 3.5.1 shows the block diagram of the external reset pin.
RST
Pin
F : Source oscillation
C
n External Reset Pin Functions
Inputting an "L" level to the external reset pin (RST) generates an internal reset signal.
On products with the reset output, the pin outputs an "L" level depending on internal reset
sources or during the oscillation stabilization delay time due to an external reset. Software reset,
watchdog reset, and power-on reset are classed as internal reset sources.
Table 3.5.1 lists the reset sources and the reset output (optional).

Table 3.5.1 Reset Source and Reset Output (Optional)

External reset during stop
mode or when the power is
turned on
Software reset
Watchdog reset
Power-on reset
Check: • On products with power-on reset, the external reset input is sampled on the internal clock, except
• Products without power-on reset accept reset inputs asynchronous with the internal clock.
• Initialization of the internal circuit requires a clock. Especially when an external clock is used, a
MB89620 series
Pull-up resistor
Approx. 50 kΩ/5.0V
Option
P-ch
With reset output
N-ch
CPU operating clock
Input buffer

Figure 3.5.1 Block Diagram of External Reset Pin

Reset source
When an external reset is input, the pin outputs the reset signal during the
oscillation stabilization delay time (only on products with power-on reset).
Outputs the reset signal for four instruction cycles.
Outputs the reset signal for four instruction cycles.
After the power is turned on, the pin outputs the reset signal during the oscillation
stabilization delay time (only on products with power-on reset).
when in stop mode. Therefore, reset inputs are not accepted if the source oscillation is halted.
clock is needed to be input at the reset.
Internal reset source
Without reset output
Option
(divide-by-two F )
C
Synchronizing circuit
Reset output
With power-on
reset
Internal reset signal
Without power-on
reset
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