Figure 29. Physical Address Generation; Figure 30. Physical Address Generation 2 - ZiLOG Z8018 Series User Manual

Z8018x
Family MPU User Manual
64
MMU Common/
Bank Area
Register
D7 — D4
MMU Common/
Bank Area
Register
D3 — D0
MMU Common Base Reg.
MMU Bank Base Reg.
0 0 0 0 0 0 0 0
Base Register
UM005004-0918
4
Comparator
4
(19) 18
Physical
Address
(512 k or 1 M)
Figure 29. Physical Address Generation
Logical
Address
(64 k)
(7)
(8 bit)
(1 M)
(19)
Physical
Address
Figure 30. Physical Address Generation 2
12 11
15
4
4
8
Adder
8
12 11
15 12 11
4 3 0
18 16 15 12 11
0
Logical
Address
(64K)
0
0
0