Figure 38. Int0 Mode 1 Timing - ZiLOG Z8018 Series User Manual

Z8018x
Family MPU User Manual
78
Phi
INT0
–
A0 A19
M1
MREQ
IORQ
RD
WR
–
D0 D7
ST
UM005004-0918
Last MC
T1 T2
Figure 38. INT0 Mode 1 Timing
INT0 Mode 2
This method determines the restart address by reading the contents of a
table residing in memory. The vector table consists of up to 128 two-byte
restart addresses stored in low byte, high byte order.
INT0 Acknowledge Cycle
PC is pushed onto stack
TW* TW* T3 T1 T2
SP-1
PC
PCH
*Two Wait States are automatically inserted
Op Code Fetch Cycle
T3 T1 T2 T3 T1
SP-2
PCL
T2 T3
0038H