ZiLOG Z8018 Series User Manual page 252

Z8018x
Family MPU User Manual
238
UM005004-0918
MNEMONICS
CALL mn
CCF
CPD
CPDR
CP (HL)
CPI
CPIR
CP (IX+d)
CP (IY+d)
CPL
CP m
CP g
DAA
DEC (HL)
DEC IX
DEC IY
DEC (IX+d)
DEC (IY+d)
DEC g
DEC ww
DI
DJNZ j
Machine
Bytes Cycles
3 6
3 6
1 1
2 6
2 8
2 6
1 2
2 6
2 8
2 6
3 6
3 6
1 1
2 2
1 2
1 2
1 4
2 3
2 3
3 8
3 8
1 2
1 2
1 1
2 5
States
16
(If condition is true)
16
3
12
14
≠ ≠
(If BC 0 and Ar
R
12
(If BC = 0 or Ar = (HL)
R
6
12
14
≠ ≠
(If BC 0 and Ar
R
12
(If BCR = 0 or Ar = (HL)
14
14
3
6
4
4
10
7
7
18
18
4
4
3
≠
9 (if Br 0)
(HL)
M
M
(HL)
M
M