Figure 65. Timer Output Timing Diagram; Figure 66. Prt Interrupt Request Generation - ZiLOG Z8018 Series User Manual

Z8018x
Family MPU User Manual
164
TIF1
TIE1
TIF0
TIE0
UM005004-0918
Timer Data
Reg. = 0001H
Phi
TOUT
Figure 65. Timer Output Timing Diagram
PRT Interrupts
The PRT interrupt request circuit is illustrated in Figure 66.
Figure 66. PRT Interrupt Request Generation
PRT and RESET
During RESET, the bits in TCR are initialized as defined in the TCR
register description. Down counting is stopped and the TMDR and RLDR
registers are initialized to
address output function.
Timer Data
Reg. = 0000H
IEF1
. The A18/TOUT pin reverts to the
FFFFH
PRT1 Interrupt
Request
PRT0 Interrupt
Request