ZiLOG Z8018 Series User Manual page 286

Z8018x
Family MPU User Manual
272
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Machine
Instruction Cycle
MC1
OTIR
MC2
OTDR
(if Br=0)
MC3
MC4
MC1
POP zz
MC2
MC3
MC1
POP IX
MC2
POP IY
MC3
MC4
PUSH zz MC1
MC2
~MC3
MC4
MC5
UM005004-0918
States Address Data
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
T1T2T3 HL DATA
T1T2T3 BC DATA
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 SP DATA
T1T2T3 SP+1 DATA
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
T1T2T3 SP DATA
T1T2T3 SP+1 DATA
T1T2T3 1st Op Code 1st Op
Address Code
TiTi * Z
T1T2T3 SP-1 zzH
T1T2T3 SP-2 zzL
RD WR MREQ IORQ M1 HALT ST
0 1 0 1
0 1 0 1
0 1 0 1
1 0 1 0
0 1 0 1
0 1 0 1
0 1 0 1
0 1 0 1
0 1 0 1
0 1 0 1
0 1 0 1
0 1 0 1
1 1 1 1
1 0 0 1
1 0 0 1
0 1 0
0 1 1
1 1 1
1 1 1
0 1 0
1 1 1
1 1 1
0 1 0
0 1 1
1 1 1
1 1 1
0 1 0
1 1 1
1 1 1
1 1 1