ZiLOG Z8018 Series User Manual page 175

Timer Reload Register Channel 1L (RLDR1L: 16H)
Bit 7
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Timer Reload Register Channel 1H (RLDR1H: 17H)
Bit 7
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Timer Control Register (TCR)
TCR monitors both channels (PRT0, PRT1) TMDR status. It also controls
enabling and disabling of down counting and interrupts along with
controlling output pin A18/TOUT for PRT1.
Timer Control Register (TCR: 10H)
Bit 7
Bit/Field TIF1
R/W R
Reset 0
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
6 5
Timer Reload Data
6 5
Timer Reload Data
6 5
TIF0 TIE1 TIE0
R R/W
0 0
Family MPU User Manual
4 3
R/W
0
4 3
R/W
0
4 3
TOC1 TOC0
R/W R/W R/W
0 0
Z8018x
2 1 0
2 1 0
2 1 0
TDE1 TDE0
R/W R/W
0 0
UM005004-0918
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0