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Bus Control Signal Conditions
BUS AND CONTROL SIGNAL CONDITION IN EACH MACHINE
CYCLE
* (ADDRESS) invalid
Z (DATA) high impedance.
** added new instructions to Z80
Table 51.
Bus and Control Signal Condition in Each Machine Cycle
Machine
Instruction
Cycle
MC1
ADD HL,ww
MC2
~MC5
MC1
ADD IX,xx
MC2
ADD IY,yy
MC3
~MC6
MC1
ADC HL,ww
SBC HL,ww
MC2
MC3
~MC6
States
Address
Data
T1T2T3 1st Op Code
1st Op
Address
Code
TiTiTiTi *
Z
T1T2T3 1st Op Code
1st Op
Address
Code
T1T2T3 2nd Op Code
2nd Op
Address
Code
TiTiTiTi *
Z
T1T2T3 1st Op Code
1st Op
Address
Code
T1T2T3 2nd Op Code
2nd Op
Address
Code
TiTiTiTi *
Z
Family MPU User Manual
RD WR MREQ
IORQ M1 HALT ST
0
1
0
1
1
1
1
1
0
1
0
1
0
1
0
1
1
1
1
1
0
1
0
1
0
1
0
1
1
1
1
1
Z8018x
251
0
1
0
1
1
1
0
1
0
0
1
1
1
1
1
0
1
0
0
1
1
1
1
1
UM005004-0918
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are there a timing diagrams for PUSH and POP instructions?