ZiLOG Z8018 Series User Manual page 56

Z8018x
Family MPU User Manual
42
I/O Control Register (ICR: 3FH)
Bit
Bit/Field IOA7
R/W R/W
Reset
R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
Position Bit/Field R/W
–
7 6 IOA7:6
5 IOSTP
UM005004-0918
To avoid address conflicts with external I/O, the Z8X180 internal I/O
addresses can be relocated on 64-byte boundaries within the bottom 256
bytes of the 64KB I/O address space.
I/O Control Register (ICR)
ICR allows relocating of the internal I/O addresses. ICR also controls
enabling/disabling of the IOSTOP mode.
7 6
IOA6 IOSTP
R/W R/W
0 0
Value
R/W
R/W
5 4
— —
0
Description
IOA7 and IOA6 relocate internal I/O as depicted in
Figure . The high-order 8 bits of 16-bit internal I/O
addresses are always 0. IOA7 and IOA6 are cleared to 0
during RESET.
IOSTOP mode is enabled when IOSTP is set to 1.
Normal. I/O operation resumes when IOSTP is reset to 0.
3 2
— —
1 0
—