ZiLOG Z8018 Series User Manual page 273

Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Machine
Instruction Cycle
MC1
MC2
IN g,(C)
MC3
MC1
MC2
INO g,(m)**
MC3
MC4
MC1
MC2
INI
IND
MC3
MC4
MC1
MC2
INIR
INDR
MC3
(If Br≠0)
MC4
MC5~M
C6
States Address Data
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
T1T2T3 BC DATA
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
T1T2T3 1st operand m
Address
T1T2T3 m to A0~A7 DATA
00H to
A8~A15
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
T1T2T3 BC DATA
T1T2T3 HL DATA
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
T1T2T3 BC DATA
T1T2T3 HL DATA
TiTi * Z
Family MPU User Manual
RD WR MREQ IORQ M1 HALT ST
0 1 0 1
0 1 0 1
0 1 1 0
0 1 0 1
0 1 0 1
0 1 0 1
0 1 1 0
0 1 0 1
0 1 0 1
0 1 1 0
1 0 0 1
0 1 0 1
0 1 0 1
0 1 1 0
1 0 0 1
1 1 1 1
Z8018x
259
0 1 0
0 1 1
1 1 1
0 1 0
0 1 1
1 1 1
1 1 1
0 1 0
0 1 1
1 1 1
1 1 1
0 1 0
0 1 1
1 1 1
1 1 1
1 1 1
UM005004-0918