ZiLOG Z8018 Series User Manual page 284

Z8018x
Family MPU User Manual
270
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Machine
Instruction Cycle
MC1
MC2
OTIM**
OTDM**
MC3
MC4
MC5
MC6
MC1
MC2
OTIMR**
OTDMR**
MC3
(If Br≠0)
MC4
MC5
MC6~M
C8
UM005004-0918
States Address Data
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
Ti * Z
T1T2T3 HL DATA
T1T2T3 C to A0~A7 DATA
00H to
A8~A15
Ti * Z
T1T2T3 1st Op Code 1st Op
Address Code
T1T2T3 2nd Op Code 2nd Op
Address Code
Ti * Z
T1T2T3 HL DATA
T1T2T3 C to A0~A7 DATA
00H to
A8~A15
TiTiTi * Z
RD WR MREQ IORQ M1 HALT ST
0 1 0 1
0 1 0 1
1 1 1 1
0 1 0 1
1 0 1 0
1 1 1 1
0 1 0 1
0 1 0 1
1 1 1 1
0 1 0 1
1 0 1 0
1 1 1 1
0 1 0
0 1 1
1 1 1
1 1 1
1 1 1
1 1 1
0 1 0
0 1 1
1 1 1
1 1 1
1 1 1
1 1 1