Timing Diagrams; Figure 81. Ac Timing Diagram 1 - ZiLOG Z8018 Series User Manual

Timing Diagrams

PHI
ADDRESS
WAIT
MREQ
IORQ
RD
WR
M1
ST
Data IN
Data OUT
62
RESET
68
Figure 81.
Opcode Fetch Cycle
T T T
1 2 W
2 3
4
5
1
6
20 20
19 19
7
8
9
10
17
15
63
67
AC Timing Diagram 1
Family MPU User Manual
I/O Write Cycle*
I/O Read Cycle*
T T T
3 1 2
12
11
7
11
28
13
9
22
14
18
16
24
23
Z8018x
T T T
W 3 1
29
11
13
11
25
26
21
15
16
27
62
63
67
68
UM005004-0918
197