ZiLOG Z8018 Series User Manual page 227

Mpu
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Table 38.
Arithmetic and Logical Instructions (8-bit) (Continued)
Operation
Name
Mnemonics
Op Code
DEC
DEC g
00 g 101
DEC (HL)
00 110 101
DEC (IX + d)
11 011 101
00 110 101
<d>
DEC (IY + d)
11 111 101
00 1101 01
<d>
INC
INC g
00 g 100
INC (HL)
00 110 100
INC (IX + d)
11 011 101
00 110 100
<d>
INC (IY + d)
11 111 101
00 110 100
<d>
MULT
MLT ww**
11 101 101
01 WWI
100
NEGATE
NEG
11 101 101
01 000 100
Addressing
Immed Ext Ind
Reg RegI Imp Rel
S/D
S/D
S/D
S/D
S/D
S/D
S/D
S/D
S/D
S/D
Family MPU User Manual
Bytes States Operation
1
4
gr-1→gr
1
10
(HL)
-1→(HL)
M
M
3
18
(IX + d))
-I→
M
(IX + d))
M
3
18
(IY + d)
-1→
M
(IY + d)
M
1
4
gr + I→gr
1
10
(HL)
+ I→(HL)
M
M
3
18
(IX + d))
+ 1→
M
(1X + d))
M
3
18
(IY + d)v + 1→
(IY + d)v
2
17
wwHr→wwLr→wwI
2
6
0-Ar→Ar
UM005004-0918
Z8018x
213
Flags
7
6
4
2
1
0
S Z
H P/V N C
↑ ↑ ↑ V
S •
↑ ↑ ↑ V
S •
↑ ↑ ↑ V
S •
↑ ↑ ↑ V
S •
↑ ↑ ↑ V
R •
↑ ↑ ↑ V
R •
↑ ↑ ↑ V
R •
↑ ↑ ↑ V
R •
• •
↑ ↑ ↑ Y
S ↑

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