Figure 85. E Clock Timing (Memory R/W Cycle) (I/O R/W Cycle) - ZiLOG Z8018 Series User Manual

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(I/O Read)
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D –D
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Figure 85.
PHI
E
BUS RELEASE mode
SLEEP mode
SYSTEM STOP mode
Figure 86.
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E Clock Timing (Memory R/W Cycle) (I/O R/W Cycle)
49
E Clock Timing (BUS RELEASE Mode, SLEEP Mode, and
SYSTEM STOP Mode
Family MPU User Manual
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W 3
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15
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UM005004-0918
Z8018x
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