Interrupt Occurrence And Flag Set Timing; Figure 12.4.5A Timing To Set Pe, Ore, Fre, And Rdrf (Mode 0); Figure 12.4.5B Timing To Set Ore, Fre, And Rdrf (Mode 1) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

12.4.5 Interrupt occurrence and flag set timing

UART has five flags and two interrupt causes.
The five flags are PE, ORE, FRE, RDRF, and TDRE. PE indicates a parity error, ORE indicates an overrun
error, and FRE indicates a framing error. These three flags are set when the corresponding error occurs
during reception, and are cleared when '0' is written to REC of the SCR register. RDRF is set when the
received data is loaded into the SIDR register, and is cleared when the SIDR register is read. The parity
detection function is not available in mode 1, and the parity and framing error detection functions are not
available in mode 2. TDRE is set when the SODR register becomes empty and can be written to. TDRE is
cleared when the SODR register is written to.
The two interrupt causes are for reception and transmission. During reception, an interrupt is requested by
PE, ORE, FRE, and RDRF. During transmission, an interrupt is requested by TDRE. The timing to set
interrupt flags in each operation mode is described below.
(1) Reception in mode 0
The PE, ORE, FRE, and RDRF flags are set when reception is completed and the last stop bit is
detected. Then, an interrupt request is issued to the CPU. If the PE, ORE, and FRE flags are active, the
data in SIDR is invalid.
Reception interrupt

Figure 12.4.5a Timing to set PE, ORE, FRE, and RDRF (mode 0)

(2) Reception in mode 1
The ORE, FRE, and RDRF flags are set when reception is completed and the last stop bit is detected.
Then, an interrupt request is issued to the CPU. Since the receivable data length is eight bits, the ninth
bit indicating the address and data is invalid. If the ORE and FRE flags are active, the data in SIDR is
invalid.
ORE, FRE
Reception interrupt
(3) Reception in mode 2
The ORE and RDRF flags are set when reception is completed and the last data item (D7) is detected.
MB90580 Series
Data
PE, ORE, FRE
RDRF
Data
D7
RDRF

Figure 12.4.5b Timing to set ORE, FRE, and RDRF (mode 1)

Stop
D6 D7
Stop
Address/Data
12.4 Operations
Chapter 12: UART 137