Figure 2.1.2D 32-Bit Data Transfer; Figure 2.1.2E Al-Ah Transfer - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

2.1 CPU
Accumulator (A)
The A register consists of two 16-bit arithmetic operation registers (AH and AL). The A register is used as
a temporary storage for operation results and transfer data. During 32-bit data processing, AH and AL are
used together. Only AL is used for word processing in 16-bit data processing mode or for byte processing
in 8-bit data processing mode (see Figures 2.1.9 and 2.1.10). The data stored in the A register can be
operated upon with the data in memory or registers (Ri, Rwi, or Rli). In the same manner as with the
2
F MC-8L, when a word or shorter data item is transferred to AL, the previous data item in AL is automati-
cally sent to AH (data preservation function). The data preservation function and operation between AL
and AH help improve processing efficiency.
When a byte or shorter data item is transferred to AL, the data is sign-extended or zero-extended and
stored as a 16-bit data item in AL. The data in AL can be handled either as word or byte long.
When a byte-processing arithmetic operation instruction is executed on AL, the high-order eight bits of AL
before operation are ignored. The high-order eight bits of the operation result all become zeroes.
The A register is not initialized by a reset. The A register holds an undefined value immediately after a
reset.
MOVL A,@RW1+6
Old A
XXXX
New A
Old A
New A
22 Chapter 2: CPU
XXXX
H H
A6
DTB
H
8F74 2B52
H H
AH AL

Figure 2.1.2d 32-bit data transfer

MOVW A,@RW1+6
XXXX
1234
H
H
A6
DTB
H
1234 2B52
H H

Figure 2.1.2e AL-AH transfer

MSB
A61540
8F
H
A6153E 2B
H
+6
RW1 15
MSB
A61540
8F
H
2B
A6153E
H
+6
15
RW1
LSB
74
H H
52
H H
38
H H
LSB
74
H H
52
H H
38
H H
MB90580 Series